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  this is information on a product in full production. november 2013 docid022767 rev 6 1/28 VNL5030J-E vnl5030s5-e omnifet iii fully protected low-side driver datasheet - production data features ? automotive qualified ? drain current: 25 a ? esd protection ? overvoltage clamp ? thermal shutdown ? current and power limitation ? very low standby current ? very low electromagnetic susceptibility ? compliant with european directive 2002/95/ec ? open drain status output description the VNL5030J-E and vnl5030s5-e are monolithic devices made using stmicroelectronics ? vipower ? technology, intended for driving resistive or inductive loads with one side connected to the battery. built-in thermal shutdown protects the chip from overtemperature and short-circuit. output current limitation protects the devices in an overload condition. in case of long duration overload, the device limits the dissipated power to a safe level up to thermal shutdown intervention.thermal shutdown, with automatic restart, allows the device to recover normal operation as soon as a fault condition disappears. fast demagnetization of inductive loads is achieved at turn-off. type v clamp r ds(on) i d VNL5030J-E 41 v 30 m 25 a vnl5030s5-e so-8 powersso-12 table 1. devices summary package order codes tube tape and reel powersso-12 VNL5030J-E vnl5030jtr-e so-8 vnl5030s5-e vnl5030s5tr-e www.st.com
contents VNL5030J-E/ vnl5030s5-e 2/28 docid022767 rev 6 contents 1 block diagrams and pins configurations . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.1 mcu i/o protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4 package and pc board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 powersso-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 so-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.2 powersso-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.3 so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.4 powersso-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.5 so-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
docid022767 rev 6 3/28 VNL5030J-E/ vnl5030s5-e list of tables 3 list of tables table 1. devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. suggested connections for unused and n.c. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 6. powermos section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 7. source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 8. status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 9. logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 10. open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 11. supply section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 12. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 13. protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 14. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 15. powersso-12 thermal parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 16. so-8 thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 17. powersso-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 18. so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 19. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
list of figures VNL5030J-E/ vnl5030s5-e 4/28 docid022767 rev 6 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. configuration diagrams (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. source diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 5. static drain source on-resistance vs. drain current (v in = 3.5 v) . . . . . . . . . . . . . . . . . . . . 11 figure 6. static drain source on-resistance vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. static drain source on-resistance vs. drain current (v in = 5 v). . . . . . . . . . . . . . . . . . . . . . 11 figure 8. transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 9. transfer characteristics (inside view for v in = 2 v to 3 v) . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 10. output characteristics (t case = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 11. on-resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 12. input threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 13. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 14. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 15. maximum demagnetization energy (v cc = 13.5 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 16. powersso-12 pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 17. powersso-12 rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . 16 figure 18. powersso-12 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 17 figure 19. thermal fitting model of a lsd in powersso-12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 20. so-8 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. so-8 rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . 19 figure 22. so-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. thermal fitting model of a lsd in so-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 24. powersso-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 25. so-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 26. powersso-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 27. powersso-12 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 28. so-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 29. so-8 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6
docid022767 rev 6 5/28 VNL5030J-E/ vnl5030s5-e block diagrams and pins configurations 27 1 block diagrams and pins configurations figure 1. block diagram table 2. pin function name function input voltage controlled input pin with hysteresis, cmos compatible; it controls output switch state. drain powermos drain. source powermos source and ground reference for the control section. supply supply voltage connected to the signal part (5 v). status open drain digital diagnostic pin. tab exposed pad. powermos drain. ("1($'5 $ 5$,1 *, /2 & '5,9(5 &xuuhqw /lplwdwlrq 3rzhu &odps 2))6wdwh 2shqordg 29(57(03(5$785( 3527(&7,21 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7,21 ,1387 67$786 6285&( 6833/< $pouspm%jbhoptujd 4611-:
block diagrams and pins configurations VNL5030J-E/ vnl5030s5-e 6/28 docid022767 rev 6 figure 2. current and voltage conventions figure 3. configuration diagrams (top view) table 3. suggested connections for unused and n.c. pins connection / pin status n.c. input floating x (1) 1. x: do not care. xx to ground not allowed x through 10 k resistor */165 4611-: %3"*/ 4063$& 45"564 * % 7 %4 * 45"5 * */ 7 */ 7 45"5 ("1($'5 * 4 7 4611-: 3/  '5$,1 '5$,1 6285&( 6285&( 67$786 6833/< ,1387 1&         *$3*&)7             3rzhu662 6285&( 6285&( 6285&( 6285&( 6285&( 6285&( '5$,1 6833/< ,1387 67$786 1& '5$,1 7$% '5$,1 *$3*&)7
docid022767 rev 6 7/28 VNL5030J-E/ vnl5030s5-e electrical specifications 27 2 electrical specifications 2.1 absolute maximum ratings stressing the device above the rating listed in ta ble 4 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2.2 thermal data table 4. absolute maximum ratings symbol parameter value unit powersso-12 so-8 v ds drain-source voltage (v in = 0 v) internally clamped v i d dc drain current internally limited a -i d reverse dc drain current 30 a i s dc supply current -1 to 10 ma i in dc input current -1 to 10 ma i stat dc status current -1 to 10 ma v esd1 electrostatic discharge (r = 1.5 k ; c = 100 pf) ?drain ? supply, input, status 5000 4000 v v esd2 electrostatic discharge on output pin only (r = 330 , c = 150 pf) 2000 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c e as single pulse avalanche energy (l = 1.16 mh, t j =150c, r l =0, i out =i liml ) 184 mj table 5. thermal data symbol parameter maximum value unit powersso-12 so-8 r thj-amb thermal resistance junction-ambient 61 101 c/w
electrical specifications VNL5030J-E/ vnl5030s5-e 8/28 docid022767 rev 6 2.3 electrical characteristics values specified in this section are for v supply = v in = 4.5 v to 5.5 v, -40c < t j < 150c, unless otherwise stated. table 6. powermos section symbol parameter test conditions min. typ. max. unit v supply operating supply voltage 3.5 5 5.5 v r on on-state resistance i d = 2.8 a; t j =25c; v supply =v in =5v 30 m i d = 2.8 a; t j =150c; v supply =v in =5v 60 v clamp drain-source clamp voltage v in =0v; i d =2.8a 414652 v v clth drain-source clamp threshold voltage v in =0v; i d =2ma 36 v i dss off-state output current v in =0v; v ds =13v; t j =25c 03 a v in =0v; v ds =13v; t j =125c 05 table 7. source drain diode symbol parameter test conditions min. typ. max. unit v sd forward on voltage i d = 2.8 a; v in =0v ? 0.8 ? v table 8. status pin symbol parameter test conditions min. typ. max. unit v stat status low output voltage i stat =1ma 0.5 v i lstat status leakage current normal operation; v stat =5v 10 a c stat status pin input capacitance normal operation; v stat =5v 100 pf v stcl status clamp voltage i stat =1ma 5.5 7 v i stat =-1ma -0.7 table 9. logic input symbol parameter test conditions min. typ. max. unit v il low-level input voltage 0.9 v i il low-level input current v in =0.9v 1 a v ih high-level input voltage 2.1 v i ih high-level input current v in =2.1v 10 a v i(hyst) input hysteresis voltage 0.13 v
docid022767 rev 6 9/28 VNL5030J-E/ vnl5030s5-e electrical specifications 27 v icl input clamp voltage i in =1ma 5.5 7 v i in =-1ma -0.7 table 10. open-load detection symbol parameter test conditions min. typ. max. unit v ol open-load off-state voltage detection threshold v in =0v 0.6 1.2 1.7 v t d(oloff) delay between input falling edge and status falling edge in openload condition i out =0a 45 425 1100 s table 11. supply section symbol parameter test conditions min. typ. max. unit i s supply current off-state; t j =25c; v in =v drain =0v; 10 25 a on-state; v in =5v; v ds =0v 25 65 v scl supply clamp voltage i scl =1ma 5.5 7 v i scl =-1ma -0.7 table 12. switching characteristics (1) 1. see figure 14: application schematic . symbol parameter test conditions powersso-12 so-8 unit min. typ. max min. typ. max. t d(on) turn-on delay time r l =4.5 ; v cc =13v (2) 2. see figure 13: switching characteristics . ?7.6??7.6?s t d(off) turn-off delay time r l =4.5 ; v cc =13v (2) ? 18.8 ? ? 18.8 ? s t r rise time r l =4.5 ; v cc =13v (2) ?8??8?s t f fall time r l =4.5 ; v cc =13v (2) ?9??9?s w on switching energy losses at turn-on r l =4.5 ; v cc =13v (2) ? 0.068 ? ? 0.068 ? mj w off switching energy losses at turn-off r l =4.5 ; v cc =13v (2) ? 0.077 ? ? 0.077 ? mj q g total gate charge v supply =v in =5 v ?6??6?nc table 9. logic input (continued) symbol parameter test conditions min. typ. max. unit
electrical specifications VNL5030J-E/ vnl5030s5-e 10/28 docid022767 rev 6 table 13. protection and diagnostics symbol parameter test conditions min. typ. max. unit i limh dc short-circuit current v ds =13v; v supply =v in =5v 25 35 49 a i liml short-circuit current during thermal cycling v ds =13v; t r < t j < t tsd; v supply =v in =5v 15 a t dliml step response current limit v ds =13v; v input =5v 44 s t tsd shutdown temperature 150 175 200 c t r reset temperature t rs + 1 t rs + 5 c t rs thermal reset of status 135 c t hyst thermal hysteresis (t tsd - t r ) 7c
docid022767 rev 6 11/28 VNL5030J-E/ vnl5030s5-e electrical specifications 27 2.4 electrical characteristics curves figure 4. source diode forward characteristics figure 5. static drain source on-resistance vs. drain current (v in =3.5v) figure 6. static drain source on-resistance vs. input voltage figure 7. static drain source on-resistance vs. drain current (v in =5v)             9i>9@ ,g>$@ ("1($'5               5rq>p2kp@ ,g>$@ 7  ?& 7  ?& 7  ?& s]v a?x?s ("1($'5 /puf*oqvuboetvqqmzqjotdpoofdufeuphfuifs                     5rq>p2kp@ 9lq>9@ 7  ?& 7  ?& 7  ?& /a?x? ("1($'5 /puf*oqvuboetvqqmzqjotdpoofdufeuphfuifs             5rq>p2kp@ ,g>$@ 7  ?& 7  ?& 7  ?& s]v a?s ("1($'5 /puf*oqvuboetvqqmzqjotdpoofdufeuphfuifs
electrical specifications VNL5030J-E/ vnl5030s5-e 12/28 docid022767 rev 6 figure 8. transfer characteristics figure 9. transfer characteristics (inside view for v in = 2v to 3v) figure 10. output characteristics (t case = 25c) figure 11. on-resistance vs. temperature figure 12. input threshold vs. temperature                 ,g $ 9lq 9 7 ?& 7 ?& 7 ?& ("1($'5 /puf*oqvuboetvqqmzqjotdpoofdufeuphfuifs ("1($'5 /puf*oqvuboetvqqmzqjotdpoofdufeuphfuifs                     ,g $ 9lq 9 7 ?& 7 ?& 7 ?& ("1($'5 /puf*oqvuboetvqqmzqjotdpoofdufeuphfuifs             ,g $ 9gv 9 9lq 9v 9 9lq 9v 9 9lq 9v 9                      5rq>p2kp@ 7m>?&@ ,g $ ,g $ ,g $ ,g $ ,g $ s]v a?s ("1($'5 ("1($'5 /puf*oqvuboetvqqmzqjotdpoofdufeuphfuifs                       9lqwk>9@ 7m>?&@ / au
docid022767 rev 6 13/28 VNL5030J-E/ vnl5030s5-e electrical specifications 27 figure 13. switching characteristics table 14. truth table conditions input drain status normal operation l h h l h h current limitation l h h x h h overtemperature l h h h h l undervoltage l h h h x x output voltage < v ol l h l l l h
application information VNL5030J-E/ vnl5030s5-e 14/28 docid022767 rev 6 3 application information figure 14. application schematic 3.1 mcu i/o protection st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/o pins from latching up (a) . the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the lsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os: equation 1 let: ? i latchup > 20 ma ? v ohc > 4.5 v ? 35 r prot 100 k '!0'#&4 96833/< 9 67$786 '5$,1 6285&( 5surw 5surw 5vxsso\ ,1387 9 5 / 9ff 0lfur&rqwuroohu n a. in case of negative transient on the drain pin. 0.7 i latchup -------------------- r prot v oh c v ih ? () i ih max --------------------------------------- - ?
docid022767 rev 6 15/28 VNL5030J-E/ vnl5030s5-e application information 27 then, the recommended value is r prot = 1 k figure 15 shows the turn-off current drawn during the demagnetization. figure 15. maximum demagnetization energy (v cc = 13.5 v) *$3*&)7         , $ / p+ 91/[ 0d[lpxpwxuqriifxuuhqwyhuvxvlqgxfwdqfh 91/[6lqjoh3xovh 5hshwlwlyhsxovh7mvwduw ?& 5hshwlwlyhsxovh7mvwduw ?&         (>p-@ 7ghpdj>pv@ 91/[ 0d[lpxpwxuqrii(qhuj\yhuvxv7ghpdj 91/[6lqjoh3xovh 5hshwlwlyhsxovh7mvwduw ?& 5hshwlwlyhsxovh7mvwduw ?&
package and pc board thermal data VNL5030J-E/ vnl5030s5-e 16/28 docid022767 rev 6 4 package and pc board thermal data 4.1 powersso-12 thermal data figure 16. powersso-12 pc board 1. layout condition of rth and zth measurements ( board finish thickness 1.6 mm +/- 10%; board double layer; board dimension 77x86; board material fr4; cu thickness 0.070mm (front and back side); thermal vias separation 1.2 mm; thermal via diameter 0. 3 mm +/- 0.08 mm; cu thickness on vias 0.025 mm; footprint dimension 4.1 mm x 6.5 mm). figure 17. powersso-12 r thj-amb vs pcb copper area in open box free air condition ("1($'5          57+mdpe gppuqsjou 1$#$vifbutjolbsfb dn?
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docid022767 rev 6 17/28 VNL5030J-E/ vnl5030s5-e package and pc board thermal data 27 figure 18. powersso-12 thermal impedance junction ambient single pulse equation 2: pulse calculation formula where = t p /t figure 19. thermal fitting model of a lsd in powersso-12 1. the fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cyc ling during thermal shutdown) are not triggered.          =7+ ?&: 7lph v &xirrwsulqw &x fp &x fp ("1($'5 z th r th z thtp 1 ? () + ? = gapgcft00533
package and pc board thermal data VNL5030J-E/ vnl5030s5-e 18/28 docid022767 rev 6 table 15. powersso-12 thermal parameters area/island (cm 2 ) footprint 2 8 r1 (c/w) 0.7 r2 (c/w) 1.2 r3 (c/w) 3 r4 (c/w) 8 8 7 r5 (c/w) 22 15 10 r6 (c/w) 26 20 15 c1 (w.s/c) 0.001 c2 (w.s/c) 0.005 c3 (w.s/c) 0.08 c4 (w.s/c) 0.1 0.1 0.1 c5 (w.s/c) 0.27 0.8 1 c6 (w.s/c) 3 6 9
docid022767 rev 6 19/28 VNL5030J-E/ vnl5030s5-e package and pc board thermal data 27 4.2 so-8 thermal data figure 20. so-8 pc board 1. layout condition of r th and z th measurements (pcb fr4 area = 58 mm x 58 mm, pcb thickness = 2 mm, cu thickness = 35 m (front and back side), copper areas: from minimum pad lay-out to 2 cm 2 ). figure 21. so-8 r thj-amb vs pcb copper area in open box free air condition gapgcft00534 24(j?amb &:         57+mdpe 3&%&xkhdwvlqnduhd fpa  uhihuwr3&%od\rxw irrwsulqw *$3*&)7
package and pc board thermal data VNL5030J-E/ vnl5030s5-e 20/28 docid022767 rev 6 figure 22. so-8 thermal impedance junction ambient single pulse equation 3: pulse calculation formula where = t p /t figure 23. thermal fitting model of a lsd in so-8 1. the fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cyc ling during thermal shutdown) are not triggered.           =7+ ?&: 7lph v &x irrwsulqw &x fp *$3*&)7 z th r th z thtp 1 ? () + ? = gapgcft00533
docid022767 rev 6 21/28 VNL5030J-E/ vnl5030s5-e package and pc board thermal data 27 table 16. so-8 thermal parameters area/island (cm 2 ) footprint 2 r1 (c/w) 0.3 r2 (c/w) 2.2 r3 (c/w) 3.5 r4 (c/w) 21 r5 (c/w) 16 r6 (c/w) 58 28 c1 (w.s/c) 0.0001 c2 (w.s/c) 0.002 c3 (w.s/c) 0.0075 c4 (w.s/c) 0.045 c5 (w.s/c) 0.35 c6 (w.s/c) 1.05 2
package and packing information VNL5030J-E/ vnl5030s5-e 22/28 docid022767 rev 6 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 powersso-12 mechanical data figure 24. powersso-12 package dimensions ("1($'5
docid022767 rev 6 23/28 VNL5030J-E/ vnl5030s5-e package and packing information 27 5.3 so-8 mechanical data figure 25. so-8 package dimensions table 17. powersso-12 mechanical data dim. mm. inch min. typ. max. min. typ. max. a 1.25 1.62 a 1.25 a1 0 0.1 a1 0 a2 1.10 1.65 a2 1.10 b 0.23 0.41 b 0.23 c 0.19 0.25 c 0.19 d 4.8 5.0 d 4.8 e 3.8 4.0 e 3.8 e0.8e0.8 h 5.8 6.2 h 5.8 h 0.25 0.5 h 0.25 l 0.4 1.27 l 0.4 k0 8k0 x 1.9 2.5 x 1.9 y 3.6 4.2 y 3.6 ddd 0.1 ddd gapgcft00145
package and packing information VNL5030J-E/ vnl5030s5-e 24/28 docid022767 rev 6 table 18. so-8 mechanical data symbol millimeters min. typ. max. a 1.75 a1 0.10 0.25 a2 1.25 b0.28 0.48 c0.17 0.23 d (1) 1. dimensions d does not include mold flash, protrusions or gate burrs. mold flash, potrusions or gate burrs shall not exceed 0.15 mm in total (both side). 4.80 4.90 5.00 e 5.80 6.00 6.20 e1 (2) 2. dimension ?e1? does not include in terlead flash or protrusions. interl ead flash or protrusions shall not exceed 0.25 mm per side. 3.80 3.90 4.00 e1.27 h0.25 0.50 l0.40 1.27 l1 1.04 k0 8 ccc 0.10
docid022767 rev 6 25/28 VNL5030J-E/ vnl5030s5-e package and packing information 27 5.4 powersso-12 packing information the devices can be packed in tube or tape and reel shipments (see the table 1: devices summary ). figure 26. powersso-12 tube shipment (no suffix) figure 27. powersso-12 tape and reel shipment (suffix ?tr?) b a c gap gcft000123 all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a 1.85 b 6.75 c ( 0.1) 0.6 base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d ( 0.05) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.1) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
package and packing information VNL5030J-E/ vnl5030s5-e 26/28 docid022767 rev 6 5.5 so-8 packing information figure 28. so-8 tube shipment (no suffix) figure 29. so-8 tape and reel shipment (suffix ?tr?) & % $ ("1($'5 all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a 3.2 b 6 c ( 0.1) 0.6
docid022767 rev 6 27/28 VNL5030J-E/ vnl5030s5-e revision history 27 6 revision history table 19. document revision history date revision changes 14-feb-2012 1 initial release. 14-jun-2012 2 updated table 2: pin function updated figure 3: configuration diagrams (top view) table 12: switching characteristics : ?q g : added row 14-sep-2012 3 table 4: absolute maximum ratings : ?-i d , i s , i stat : updated values updated table 5: thermal data and table 12: switching characteristics 15-may-2013 4 removed table: input section. updated figure 14: application schematic updated section 3.1: mcu i/o protection 18-sep-2013 5 updated disclaimer. 21-nov-2013 6 updated features list added section 2.4: electrical characteristics curves table 11: supply section : ?i s : updated max value updated figure 15: maximum demagnetization energy (v cc = 13.5 v)
VNL5030J-E/ vnl5030s5-e 28/28 docid022767 rev 6 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com


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